In microelectronic systems, electronic circuits are fabricated on a wafer of semiconductor material, such as silicon. The wafer with electronic circuits may be bonded to one or more other wafers, bonded to individual dies, or itself diced into numerous dies, each die containing a copy of the circuit. Each die that has a functional integrated circuit is known as a microchip, or “chip.” When specific functions from a library of functions are assigned to individual chips, or when a large monolithic chip is emulated by a collection of smaller chips, these smaller chips, or chips with specific or proprietary functions, may be referred to as “chiplets.” As used herein, chiplet most often means a complete subsystem IP core (intellectual property core), a reusable unit of logic, on a single die. A library of chiplets is available to provide routine or well-established IP-block functions.
Conventionally, microchips and chiplets need standard interfaces to communicate and interact with each other and with larger microelectronic layouts that make up microelectronic devices. The use of such standard interfaces is expected in the industry, and taken for granted. It is assumed in the industry that every block of logic that needs input and output (I/O) will work through a standard interface including at least some I/O protocol. A standard interface may be formally defined as:
“a point of interconnection between two systems or parts of a system, e.g., that between a processor and a peripheral, at which all the physical, electrical, and logical parameters are in accordance with predetermined values and are collectively used in other instances. An interface may be classed as standard on the basis of manufacturer, industry, or international usage. The I/O channels of a processor may be classed as standard interfaces because they are common to all processors of that type, or common to more than one type of peripheral—but they may be specific to a manufacturer. Some interfaces are de facto industry standards and can be used to connect devices from different vendors. Other interfaces are standardized by agreement within trade associations or international committees or consortiums” (A Dictionary of Computing 2004, originally published by Oxford University Press 2004).
Standard interfaces and I/O protocols provide well-characterized outputs that have drivers sufficiently large to power various output loads and to provide other benefits, such as voltage leveling and buffered inputs with electrostatic discharge (ESD) protection. The tradeoff for these benefits is that the native signals produced by the specific logic, or “core IP,” of a given microchip have to be adapted, modified, and usually routed, to be of suitable compatibility for a standard interface. The standard interfaces, in turn, enable multiple independent chips to “talk to” each other in a standardized manner according to standardized protocols, as the interfaces have standard pinout geometry, contrived serialization, standard voltages, standard timing, and so forth, to enable common compatibility. But chiplets and resulting 3D stacked IC structures are often larger, more complicated, costlier, produce more heat, and are more power-hungry than they need to be in order to support their onboard standard interfaces and I/O protocols.